![]() ![]() Over recent years both Nvidia and Intel have released their own extensions to these in the form of EPP/SLI-ready and XMP respectively. When your PC posts it'll scan the memory modules for the SPD settings, these hold the default timings for the modules at specific clock speeds. One thing we've not mentioned are the default SPD settings held within memory modules. The balancing act comes with the fact latency increases to keep timings under control. The alternative way comes from increasing the clock speed, as this simply increase the throughput of the memory. The best results come from reducing the CAS latency which you'll find will release a few per cent of extra performance, as you can see from our results. In reality there's little you can do with the majority of these settings and you'll find you gain little if you try reducing the settings. The amount of time required between memory accesses.Įither T1 or T2 indicating one or two clock cycles and is the time between the memory being activated and when the first command can be sent. How long it takes to disable an active RAS line and activate the next one. How long it takes to activate a specific RAS line and the subsequent CAS column in memory. ![]()
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